This invention relates generally to integrated circuits and more particularly to electrostatic discharge (ESD) protection of integrated circuits.
As it is known in the art, the semiconductor devices in integrated circuits (ICs) are susceptible to damage as a result of an ESD event. In particular, metal oxide semiconductor field effect transistors (MOSFETs) are prone to such damage to a much higher degree. A significant factor contributing to MOSFETs sensitivity to ESD damage is that the transistors are formed from small regions of so called N-type materials, P-type materials, and thin gate oxides. When a transistor is exposed to an ESD event, the charge applied may cause an extremely high current flow to occur within the device which can in turn cause permanent damage to the junctions, neighboring gates oxides, and/or interconnect metals.
An ESD event within an IC is typically caused by a static discharge occurring at one of the input or output pads of the IC. In an effort to guard the device against damage from the static discharge, so called ESD clamp circuits are connected between the operating circuits (which need to be protected) and their corresponding input or output pads. An ESD clamp operates to prevent the static charge from reaching the operating circuits by shunting the currents associated with an ESD event away from the operating circuits. Additionally, ESD clamps in general maintain the voltage at the pad to a value which is known to be safe for the operating circuits. Finally, an effective ESD clamp should not interfere with the protected circuits under normal operating conditions.
There are a number of ESD clamp designs in use today. Two of the most commonly used are the so called grounded-gate clamp and the so called diode-connected clamp. In the grounded-gate clamp, an ESD transistor (the shunting device) is connected between the I/O pad and a ground reference with the control terminal of the transistor coupled to the ground reference as well. For example, using an N-channel MOSFET as an ESD clamp would entail connecting its drain terminal to the I/O pad and connecting its source and gate terminals to a ground reference. This arrangement results in an ESD clamp which remains off during normal operation of the protected circuits.
The grounded-gate ESD clamp will operate in response to an ESD event as follows. An ESD event will cause the pad voltage to rise. When a trigger or threshold voltage is reached, the ESD transistor will turn on allowing current to flow through its channel to ground. The ESD transistor will reach a state where it will begin to operate in a bipolar conduction region causing the voltage at the pad to be clamped to a safe voltage level even as the pad current varies. When the ESD event ends, the ESD transistor turns off restoring the current path between the pad and the protected circuitry.
There are drawbacks associated with the grounded-gate ESD clamp design. The trigger voltage of such an ESD clamp needs to be as high as possible in order to avoid premature triggering, i.e. turning on during normal operation of the protected circuitry. However, guaranteeing high trigger voltages is difficult with the small geometries required in current semiconductor devices. Additionally, even though a grounded-gate MOSFET ESD clamp will remain off during normal operation of the protected circuit, a full range swing of switching voltages will appear at its drain since it is connected to the pad. This voltage swing creates continuous stress on the drain to gate oxide of the clamp MOSFET and over a period of time may cause changes in the clamp's operating characteristics.
The diode-connected clamp design alleviates some of the drawbacks of the grounded-gate clamp design. The diode-connected clamp is an ESD device which has its control terminal connected to the I/O pad instead of a ground reference. The threshold voltage of the device is tailored such that the ESD device remains off during normal operation of the protected circuit. However, during an ESD event which causes the pad voltage to rise above the ESD clamp's threshold voltage, the ESD clamp turns on and shunts the voltages and currents appearing at the pad to ground.
The diode-connected clamp is not without its own drawbacks. Although the channel current induced in a diode-connected clamp avoids the need for high trigger voltages and relieves the stress on the drain to gate interface, diode-connected clamps are subject to stress at the source to gate interface.
Moreover, the threshold voltage associated with either type of ESD clamp must typically be increased to insure that it remains off during normal operation of the protected circuitry. Unfortunately, a high threshold voltage also results in a higher clamping voltage whereas it is actually advantageous to clamp the pad to as low a voltage as possible during an ESD event so that the protected circuitry experiences as small a voltage as possible.
Another problem with both the grounded-gate and diode-connected clamps is that parasitic capacitance effects may activate an output of the protected circuitry during the beginning stages of an ESD event. If an activated output transistor reaches its trigger voltage before the ESD clamp reaches its own trigger voltage, the protected circuitry will be exposed and subject to ESD damage.
Still another drawback of the prior art ESD clamps is that the supply voltage used for the protected circuitry can be lower than the maximum signal voltages applied at the pads. Although this allows the protected circuitry to consume less power, it also complicates the design of an ESD clamp. For example, an ESD clamp may be required to allow a five volt signal at the pad while protecting an internal circuit which operates on two to three volts.
Lastly, some ESD clamp designs require a specific reference supply voltage be available for the ESD circuitry. This requirement complicates the design of ESD clamps and places restrictions on the designs of the protected circuitry.